Livt packages
Livt.IO
Version 1.8.1
Memory, UART, I2C, SPI, and Ethernet input/output components for Livt hardware designs.
Published files (126)
- ArrayRam.lvt
- AsynchronousDistributedRam.lvt
- AsynchronousDistributedRam32x16.lvt
- AsynchronousDistributedRam32x32.lvt
- AsynchronousDistributedRam8x64.lvt
- AsynchronousRam.lvt
- BlockRam.lvt
- DistributedRam.lvt
- IAsynchronousRam.lvt
- IRam.lvt
- ISynchronousRam.lvt
- Ram.lvt
- Ram16.lvt
- Ram32.lvt
- RamAccess.lvt
- RamGeometry.lvt
- SequentialRam.lvt
- SynchronousRam.lvt
src/memory/RamGeometry.lvt
namespace Livt.IO
/**
* Compile-time capacity identity for interchangeable storage providers.
* Used as the GEOMETRY type argument of the RAM interfaces: the capacity
* becomes part of the interface's type identity, even though no port uses it.
* RamAccess requires RamGeometry<ELEMENT_COUNT>, so a three-cell provider
* cannot satisfy a four-cell consumer, even if both use logic[2] addresses.
* This type-only use requires no instance and adds no hardware or runtime cost.
* It identifies capacity; it does not verify the provider's implementation
* or that its address type is wide enough.
*/
component RamGeometry<CAPACITY: int>
{
static assert CAPACITY > 0, "RAM capacity must be positive"
}