Livt.IO

tests/memory/RamTest.lvt

namespace Livt.IO.Tests

using Livt.IO

/**
 * Exercises Ram with a shared fixture instance. Each scenario establishes the inputs and
 * state it needs.
 */
@Test
component RamTest
{
	// Shared fixture instances, signals, and observation state.
	ram: Ram<byte, 2048>

	/**
	 * Creates the shared fixture instances (Ram). Tests initialize the state required by their
	 * scenario.
	 */
	new()
	{
		ram = new Ram<byte, 2048>()
	}

	/**
	 * Checks that a written byte can be read back at the same address.
	 */
	@Test
	fn TestWriteAndReadByte()
	{
		ram.Write(0, 0b10101010)

		var value = ram.Read(0)
		assert (value == 0b10101010)
	}

	/**
	 * Checks readback of distinct values written to multiple addresses.
	 */
	@Test
	fn TestWriteAndReadMultipleBytes()
	{
		ram.Write(0, 0b11110000)
		ram.Write(1, 0b00001111)
		ram.Write(10, 0b10101010)

		var value0 = ram.Read(0)
		var value1 = ram.Read(1)
		var value10 = ram.Read(10)

		assert (value0 == 0b11110000)
		assert (value1 == 0b00001111)
		assert (value10 == 0b10101010)
	}

	/**
	 * Checks the overwrite existing value case.
	 */
	@Test
	fn TestOverwriteExistingValue()
	{
		ram.Write(5, 0b11111111)
		var initial = ram.Read(5)
		assert (initial == 0b11111111)

		ram.Write(5, 0b00000000)
		var updated = ram.Read(5)
		assert (updated == 0b00000000)

		ram.Write(5, 0b10101010)
		var finalValue = ram.Read(5)
		assert (finalValue == 0b10101010)
	}

	/**
	 * Checks the boundary addresses case.
	 */
	@Test
	fn TestBoundaryAddresses()
	{
		ram.Write(0, 0b00000001)
		var addr0 = ram.Read(0)
		assert (addr0 == 0b00000001)

		ram.Write(2047, 0b11111110)
		var addr2047 = ram.Read(2047)
		assert (addr2047 == 0b11111110)

		var addr0Check = ram.Read(0)
		assert (addr0Check == 0b00000001)
	}

	/**
	 * Checks the all zeros and ones case.
	 */
	@Test
	fn TestAllZerosAndOnes()
	{
		ram.Write(20, 0b00000000)
		var zeros = ram.Read(20)
		assert (zeros == 0b00000000)

		ram.Write(21, 0b11111111)
		var ones = ram.Read(21)
		assert (ones == 0b11111111)
	}

	/**
	 * Checks the alternating bit patterns case.
	 */
	@Test
	fn TestAlternatingBitPatterns()
	{
		ram.Write(30, 0b01010101)
		var pattern1 = ram.Read(30)
		assert (pattern1 == 0b01010101)

		ram.Write(31, 0b10101010)
		var pattern2 = ram.Read(31)
		assert (pattern2 == 0b10101010)
	}

	/**
	 * Checks the sequential addresses case.
	 */
	@Test
	fn TestSequentialAddresses()
	{
		ram.Write(100, 0b00000001)
		ram.Write(101, 0b00000010)
		ram.Write(102, 0b00000011)
		ram.Write(103, 0b00000100)
		ram.Write(104, 0b00000101)

		assert (ram.Read(100) == 0b00000001)
		assert (ram.Read(101) == 0b00000010)
		assert (ram.Read(102) == 0b00000011)
		assert (ram.Read(103) == 0b00000100)
		assert (ram.Read(104) == 0b00000101)
	}

	/**
	 * Checks the data independence case.
	 */
	@Test
	fn TestDataIndependence()
	{
		ram.Write(50, 0b11001100)
		ram.Write(51, 0b00110011)
		ram.Write(52, 0b11110000)

		var val50 = ram.Read(50)
		var val51 = ram.Read(51)
		var val52 = ram.Read(52)

		assert (val50 == 0b11001100)
		assert (val51 == 0b00110011)
		assert (val52 == 0b11110000)

		ram.Write(51, 0b10101010)

		assert (ram.Read(50) == 0b11001100)
		assert (ram.Read(51) == 0b10101010)
		assert (ram.Read(52) == 0b11110000)
	}

	/**
	 * Checks the sparse address pattern case.
	 */
	@Test
	fn TestSparseAddressPattern()
	{
		ram.Write(0, 0b00000001)
		ram.Write(512, 0b01000000)
		ram.Write(1024, 0b10000000)
		ram.Write(1536, 0b11000000)
		ram.Write(2047, 0b11111111)

		assert (ram.Read(0) == 0b00000001)
		assert (ram.Read(512) == 0b01000000)
		assert (ram.Read(1024) == 0b10000000)
		assert (ram.Read(1536) == 0b11000000)
		assert (ram.Read(2047) == 0b11111111)
	}

	/**
	 * Checks the constants and valid address case.
	 */
	@Test
	fn TestConstantsAndValidAddress()
	{
		assert (this.ram.ADDRESS_WIDTH == 11)
		assert (this.ram.CAPACITY == 2048)
		assert (this.ram.MAX_ADDRESS == 2047)
		assert (ram.IsValidAddress(0) == true)
		assert (ram.IsValidAddress(2047) == true)
		assert (ram.IsValidAddress(-1) == false)
		assert (ram.IsValidAddress(2048) == false)
	}

	/**
	 * Checks the invalid addresses are safe case.
	 */
	@Test
	fn TestInvalidAddressesAreSafe()
	{
		ram.Write(0, 0x5A)
		ram.Write(-1, 0xFF)
		ram.Write(2048, 0xFF)

		assert (ram.Read(-1) == 0x00)
		assert (ram.Read(2048) == 0x00)
		assert (ram.Read(0) == 0x5A)
	}
}